Metrics and Datum Brings UVM Verification to the Cloud
UVM Verification of a Free & Open-Source
RISC-V SoC in the Cloud for Pennies per Minute
Introduction
While UVM is the most popular verification methodology for ASIC and FPGA development, it requires expensive SystemVerilog simulators to run. In addition, setting up a new UVM testbench is a complex task requiring specialist skill sets and the “time to first bug found” can be excessive. It is therefore no surprise that up to 70% of chip engineering budgets is spent on this task.
With Metrics DSim Cloud and Datum UVMx & Moore.io, this is no longer the case. DSim Cloud operates in the cloud, requires no local computing hardware, and costs only $.02-.04/minute. Datum UVMx creates all non-business-logic UVM source code from spreadsheet definition, and Datum UVMx & Moore.io (MIO) provide testbench code generation and a DevOps toolchain that reduces design time-to-market by up to 30% with a per-transaction Verification IP (VIP) pricing model.
This paper demonstrates the use of these products to specify and generate a UVM test bench to verify the CORE-V-MCU RTL design from the OpenHW Group.
Datum Technology Corporation
Metrics Design Automation Inc.
Headquartered in Ottawa, Canada, Metrics was founded in 2017 and is led by an experienced group of EDA and business executives including one of the pioneers of EDA, Joe Costello. Metrics aims to disrupt the EDA industry by providing a next generation of tools that leverage the strength and capabilities of modern technologies and the cloud to provide a new level of service and flexibility for the EDA market.
