Working at Metrics
Join the Metrics Team and be a Part of Exciting EDA Advancements
At Metrics, we’re pioneering a new approach to EDA … we call it EDA as a Service. We’re innovators in EDA tools and design flows like traditional EDA vendors, but we’re taking it to the cloud. We’re leading the way and our future keeps getting bigger and brighter!
The Metrics engineering team is based in Ottawa, Canada with additional offices in the US, India, and China and includes simulation technologists, ASIC design experts, modern cloud technology and UI/UX developers, and ASIC design solution architects. This unique combination of diverse skills and shared vision has led to Metrics’ successful first product – the Metrics Cloud Platform.
As we grow, we’re looking for engineers who share in our belief in EDA as a Service and want to contribute to expanding our products to include a complete RTL to GDSII design flow in the cloud. Working at Metrics allows you to expand your EDA skills and experience to include modern technologies like Docker containers and Kubernetes cluster orchestration.
Current Job Openings
Title: Senior Solutions Engineer
Team: Metrics Customer Experience Team (mCXT)
- Under minimal supervision and direction, the engineer will be able to execute various tasks that are essentially needed by a Design Verification Engineer in the semiconductor industry.
- As part of the mCXT you’ll work to integrate IP from Metrics’ partners with our cloud-based verification platform. You will work with Metrics customers to ensure they become productive users of our platform and provide them with first-line technical support. You will support other solutions and application engineers and interface with the R&D team to ensure technical issues are resolved quickly.
Essential Job Duties and Responsibilities:
- The engineer will be able to bring-up various third-party IPs/VIPs, written in SystemVerilog or Verilog, on our Metrics Platform using Metrics’ Cloud Simulator.
- The engineer will be able to write test plans for features specified in the LRM and execute the test plan as created
- The engineer will be able to debug tests or designs that use the Metrics Cloud Simulator.
- Porting Metrics’ partner and/or customer IP/VIP to use our Cloud simulator
- Modifying Metrics’s partner and/or customer scripts to use the Metrics regression Platform
- Provide first line technical support to customers/partners: answer questions, perform triage of technical issues encountered
- Interface with Metrics R&D teams and report issues
- Contribute to customer documentation
Knowledge, Skills and Abilities:
- Experience in using Verilog, SystemVerilog and UVM in the semiconductor industry.
- Experience in debugging third-party IPs written in major base class libraries (UVM, VMM, OVM)
- Experience in using scripting languages such as Python, Perl
- Able to work from oral and written instructions, make decisions independently, and take responsibility for them.
- Able to handle multiple priorities, work accurately, work under pressure, and respond quickly to tight deadlines.
- Able to communicate effectively, both in writing and in speaking, with customers, co-workers, and various business contacts in a courteous and professional manner.
- Experience with and knowledge of front-end ASIC/FPGA design verification: verification planning, test bench/testcase development, regression, coverage closure (code and functional coverage)
- Experience writing SystemVerilog code using major base class libraries (UVM, VMM, OVM)
- Experience using major EDA tools (Mentor, Synopsys, Cadence) for front-end ASIC/FPGA design and verification
- Experience with regression/test automation (scripts). Proficient using scripting languages, especially Python
- Excellent communication skills (oral and written)
- Ability to work in a small team and juggle many competing priorities
- Knowledge of SystemVerilog assertions
- Experience with Cadence vManager
- Experience with Docker
- Experience with Google Cloud Platform or Amazon Web Services
- Previous customer support/applications engineering experience
Education / Experience:
- It is expected that the individual has a minimum of 10 years’ experience working in the semiconductor industry and have used Verilog, SystemVerilog and UVM. Experience in using VMM, OVM would be an asset
- Bachelor’s degree or higher in Engineering, Computer Engineer or Electrical Engineering or a closely related field, or a combination of education and experience that would enable performance of the duties of the position. Work experience in the semiconductor industry with a background in Design Verification would be an asset.